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LT3439 Slew Rate Controlled Ultralow Noise1A Isolated DC/DC Transformer Driver
FEATURES
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DESCRIPTIO
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Reduced Conducted and Radiated EMI Single Resistor Control of Output Switch Voltage and Current Slew Rates Cross Conduction Prevention Circuitry Two 1A Current Limited Power Switches Low Minimum Supply Voltage: 2.8V Low Shutdown Current: < 20A 50% Duty Cycle 20kHz to 250kHz Oscillator Frequency Synchronizable to 300kHz Overcurrent and Overtemperature Protected
The LT(R)3439 is a push-pull DC/DC transformer driver that reduces conducted and radiated electromagnetic interference (EMI). Ultralow noise and EMI are achieved by controlling the output switch voltage and current slew rates. Slew rates are user adjustable to optimize output noise versus efficiency. The LT3439 can reduce high frequency harmonic content by as much as 40dB with only a minor decrease in efficiency. The LT3439 includes two 1A current limited power switches to ensure start-up under heavy loads. It also includes an oscillator that can be synchronized to an external clock for more accurate placement of switcher harmonics. Protection features include current limiting, undervoltage lockout, thermal shutdown and cross conduction prevention circuitry. The LT3439 is available in a thermally enhanced 16-pin TSSOP with an exposed backside.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATIO S
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Low Noise Isolated Supplies Radio and Telecom Supplies Distributed Supplies Medical Instruments Precision Instruments Low Noise Filament Supplies
TYPICAL APPLICATIO
Low Noise 5V to 5V Push-Pull DC/DC Transformer 5V Output Noise
OPTIONAL VIN 5V T1 CIN 22F 10V 13 11 5 6 680pF 7 16.9k VIN SHDN SYNC CT RT GND 10 RSL PGND 1, 16
3439 TA01
D1
A C1 47F 6.3V
L1 33H C2 47F 6.3V
B
*
3
* *
VOUT 5V 500mA
COL A LT3439 COL B
*
14 4 34k
B 200V/DIV
D2
CIN: MURATA GRM235Y5V226Z10 C1, C2: TDK C4532X5R0J476M D1, D2: MBR0520 L1: TDK SLF6028T-330MR69 T1: COILTRONICS 15835
A 20mV/DIV
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5s/DIV
3439 TA01b
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LT3439
ABSOLUTE
(Note 1)
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RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW PGND NC COL A RSL SYNC CT RT NC 1 2 3 4 5 6 7 8 16 PGND 15 NC 14 COL B 13 VIN 12 NC 11 SHDN 10 GND 9 NC
VIN Voltage ............................................................. 20V COL A, COL B Voltage ............................................. 35V SHDN, SYNC Voltage .............................................. 20V Maximum Junction Temperature ......................... 150C Operating Junction Temperature Range (Note 2) ............................................ - 40C to 125C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C
ORDER PART NUMBER LT3439EFE
FE PACKAGE 16-LEAD PLASTIC TSSOP
TJMAX = 125C, JA = 40C/ W NOTE: BACKSIDE OF PACKAGE CONNECTED TO GND
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The q denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN = 5V; RT = 16.9k; CT = 680pF; RSL = 16.9k; COL A, COL B, SHDN pins open, unless otherwise noted.
SYMBOL VIN VIN(MIN) IVIN IVIN(SHDN) VSHDN(ON) VSHDN(OFF) ISHDN Oscillator and Sync fMAX fSYNC VSYNC RSYNC DC BV RON ILIM(MAX) Slew Control VSLEWR VSLEWF ISLEWR ISLEWF Output Voltage Slew Rising Edge Output Voltage Slew Falling Edge Output Current Slew Rising Edge Output Current Slew Falling Edge Collector A or B Collector A or B Collector A or B Collector A or B 17 17 5 5 V/s V/s A/s A/s Oscillator Frequency Synchronization Frequency Range SYNC Pin Threshold SYNC Pin Input Resistance Switch Duty Cycle Output Switch Breakdown Voltage Output Switch On Resistance Switch Current Limit 2.8V VIN 17.5V ICOLA or ICOLB = 0.75A
q q q q q q
PARAMETER Operating Range Minimum Input Voltage Supply Current Supply Current in Shutdown Mode Shutdown Turn-On Threshold Shutdown Turn-Off Threshold Shutdown Pin Current Hysteresis
CONDITIONS
q
MIN 2.8
TYP
MAX 17.5
UNITS V V mA A V V A kHz kHz V k % V
Supply and Shutdown 2.55 2.8V VIN 17.5V 2.8V VIN 17.5V, VSHDN = 0V 2.8V VIN 17.5V 2.8V VIN 17.5V 2.8V VIN 17.5V, VSHDN = 1.4V
q q q q
2.7 20 1.4 40 250 300
12 5 1.3 1.20 10 1.26 20
1.4 40 50 35 1.2 50 0.5 1.4
2.25
Output Switches (COL A, COL B)
0.95 1.65
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.
Note 2: The LT3439E is guaranteed to meet performance specifications from 0C to 70C. Specifications over the -40C to 125C operating junction temperature range are assured by design, characterization and correlation with statistical process controls.
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LT3439 TYPICAL PERFOR A CE CHARACTERISTICS
Minimum Input Voltage vs Temperature
2.750 2.700
SUPPLY CURRENT (A)
2.650
INPUT VOLTAGE (V)
12 17.5V 10 8 5V 6 4 2 2.7V
OSCILLATOR FREQUENCY (kHz)
2.600 2.550 2.500 2.450 2.400 2.350 2.300 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C)
3439 G01
Switch Voltage Drop vs Switch Current
0.9 0.8 125C
SHDN PIN CURRENT (A)
SUPPLY CURRENT (mA)
0.7
SWITCH VOLTAGE (V)
0.6 0.5
0.4 0.3 0.2 0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 SWITCH CURRENT (A)
3439 G04
Current Limit vs Temperature
2.0 1.8
THRESHOLD VOLTAGE (V)
CURRENT LIMIT (A)
1.35 1.34 1.33 1.32 1.31 1.30 1.29 1.28
VOLTAGE THRESHOLD (V)
1.6 1.4 1.2 1.0 0.8 -50 -25
0
25 50 75 100 125 150 TEMPERATURE (C)
3439 G07
UW
85C 25C
Supply Current in Shutdown Mode vs Temperature
16 14 120
Oscillator Frequency vs Temperature
RT = 16.9k 115 CT = 680pF 110 105 100 95 90 85 80 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C)
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0 -50 -25
0
25 50 75 100 125 150 TEMPERATURE (C)
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Supply Current vs Slew Resistor
25 TA = 25C
SHDN Pin Hysteresis Current vs Temperature
24 22 20 18 16 14 12
20
15
10
5
0 0 10000 30000 20000 SLEW RESISTOR () 40000
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10 -50 -25
0
25 50 75 100 125 150 TEMPERATURE (C)
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SHDN Pin Voltage Threshold vs Temperature
1.6 1.5 1.4 1.3 1.2 1.1
1.27 -50 -25
SYNC Pin Voltage Threshold vs Temperature
0
25 50 75 100 125 150 TEMPERATURE (C)
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1.0 -50 -25
0
25 50 75 100 125 150 TEMPERATURE (C)
3439 G09
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LT3439
PI FU CTIO S
PGND (Pins 1, 16): Power ground is connected to the emitter of the power switches via an internal sense resistor. It has large currents flowing through it and should be connected to a good quality ground plane. COL A, COL B (Pins 3, 14): These are the open collectors of the output power switches. They are connected to the outer terminals of the center tap transformer. Large currents flow into these pins so external traces should be kept as short as possible. RSL (Pin 4): The slew control resistor sets the maximum current and voltage slew rate for the collectors A and B. The minimum resistor value is 3.4k for fast slewing and the maximum resistor is 34k for slow slewing. For more details, see "Slew Rate Setting" in the Applications Information section of this data sheet. SYNC (Pin 5): The SYNC pin can be used to synchronize the oscillator to an external clock. RT and CT should be set such that the oscillator clock frequency is approximately 10% below the external clock frequency. If unused, this pin should be tied to GND. For more details, see "Oscillator Sync" in the Applications Information section of this data sheet. CT (Pin 6): The oscillator capacitor pin is used in conjunction with the RT pin to set the oscillator frequency. For RT = 16.9k, CT can be calculated as follows: CT(nF) = 70/fOSC(kHz) The transformer operating frequency and the frequency of each output is one half of the frequency of the oscillator. RT (Pin 7): The oscillator resistor pin is used to set the charge and discharge currents of the oscillator capacitor. The nominal value is 16.9k. The resistance can be adjusted between 25% of nominal for better frequency accuracy. SHDN (Pin 11): The SHDN pin is used to shut down the part. Grounding this pin will disable all internal circuitry. Increasing the SHDN voltage above the turn-on threshold will enable the part. At the turn-on threshold, approximately 20A of current is sourced out of the pin. This current, in conjunction with the Thevenin resistance on the pin, sets up the hysteresis. This allows the user to set the undervoltage lockout (UVLO) of the supply and the amount of start-up hysteresis with a resistor divider off of the input voltage. Above 2.1V on the SHDN pin, the hysteresis current is reduced to zero. If unused the pin can be left floating or tied directly to the input voltage. GND (Pin 10): Signal Ground. The oscillator, slew control circuitry and the internal regulator are referred to signal ground. Internally, signal ground is tied to substrate and the exposed backside of the device. Connect the GND pin to the ground plane and keep the connection free of large currents. VIN (Pin 13): This is the supply pin for the part and should be bypassed with a 4.7F or greater, low ESR capacitor. When VIN 2.5V, an internal undervoltage lockout circuit will trip and turn both outputs off.
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LT3439
BLOCK DIAGRA
11
LDO REGULATOR T INTERNAL VCC RT 7 CT 6 5 RT CT SYNC OSCILLATOR FF
OPERATIO
Push-Pull Topology The push-pull DC transformer topology is a very straightforward switching power supply. The two switches are turned on out of phase at 50% duty cycles. During the switch on time, VIN is applied across the primary side of the transformer. The voltage on the secondary side of the transformer is simply VIN times the turns ratio. The diodes rectify the secondary voltage and generate the output voltage. The output capacitor is for hold-up and filtering. Some of the topology's advantages are: 1) Stepping up or down the input voltage can easily be done by setting the turns ratio. 2) The transformer provides isolation between the input and output. 3) Each switch cycle applies VIN across the transformer in opposite polarities. Therefore, the transformer core never saturates and a separate reset circuit is not necessary. The push-pull topology is not without its concerns. An imbalance in the two sides of the transformer can
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T1 VIN D1 VOUT COUT D2
* *
* *
13 LT3439 COLA
3
14 COLB
SHDN VIN
Q SLEW CONTROL QB
OUTPUT DRIVERS
+
RSENSE 16 PGND 1
-
10 GND 4 RSL
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RSL
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eventually cause the transformer to saturate. Also, during the turn-off of the switches, the leakage inductance causes a large undesirable voltage spike. The LT3439 slew control feature addresses both of these concerns and is discussed in the Applications Information section. Slew Control Control of voltage and current slew rate is maintained via two feedback loops. One loop controls the output switch collector voltage dV/dt and the other loop controls the emitter current dI/dt. Output slew control is achieved by comparing the two currents generated by these slewing events to a current set by the external resistor RSL. The two control loops work together to provide a smooth transition from voltage slew control to current slew control. Internal Regulator Most of the control circuitry operates from an internal 2.4V low dropout regulator that is powered from VIN. VIN can
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LT3439
OPERATIO
vary from 2.8V to 17.5V with very little change in device performance. When the part is in shutdown mode, the internal regulator is turned off, drawing less than 20A of current from VIN. Overcurrent Protection A linearly controlled current limit circuit is provided to protect the circuit from excessive currents and to facilitate start-up into a highly capacitive load. Upon reaching current limit, the switching cycle is not terminated, instead the base drive to the output transistor is regulated to maintain the maximum current over the entire switch cycle. Very high power dissipation in the switches occurs during this mode of operation. If the current limit is enabled for a long enough period of time, over temperature protection shutdown will be enabled to protect the device.
APPLICATIO S I FOR ATIO
Reducing EMI from switching power supplies has traditionally invoked fear in designers. Many switchers are designed solely on efficiency and, as such, produce waveforms filled with high frequency harmonics that propagate through the rest of the supply. The LT3439 provides control of two of the primary variables for controlling EMI while switching inductive loads: switch voltage slew rate and switch current slew rate. The use of this part will reduce noise and EMI over conventional switch mode controllers. Because these variables are under control, a supply built with this part will exhibit far less tendency to create EMI and less chance of running into problems during production. It is beyond the scope of this data sheet to get into EMI fundamentals. AN70, "A Monolithic Switching Regulator with 100V Output Noise" contains much information concerning noise in switching regulators and should be consulted. Oscillator Frequency The internal oscillator generates the switching frequency that determines the fundamental positioning of the
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Overtemperature Protection When the IC has exceeded the maximum temperature the part will trigger the overtemperature protection circuit where both output drivers are turned off. Undervoltage Lockout Protection When VIN is below 2.55V the part will go into undervoltage lockout mode where both output drivers are turned off. No Load Operation The operation of the supply is stable all the way down to zero load and a preload is not required. harmonics. Using quality external components is important to ensure oscillator frequency stability. A current defined by external resistor RT charges and discharges the capacitor CT creating a saw tooth waveform where the outputs' states change at the peak. The frequency of each output is one half of the frequency of the oscillator. By having both components external, the user has greater flexibility in setting the frequency and the frequency is less susceptible to any temperature variations in the device. The external capacitance CT is chosen by: CT(nF) = 1183/[fOSC(kHz) * RT(k)] where fOSC is the desired oscillator frequency. For RT equal to 16.9k, this simplifies to: CT(nF) = 70/fOSC(kHz) e.g., CT = 1nF for fOSC = 70kHz Nominally, RT should be set to 16.9k. Low tolerance and low temperature coefficient components are recommended.
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LT3439
APPLICATIO S I FOR ATIO
Oscillator SYNC
The oscillator can be synchronized to an external clock. Set the RC timing components for an oscillator frequency 10% below the desired sync frequency. It is recommended that the SYNC pin be driven with a square wave that has an amplitude greater than 2V, a pulse width greater than 1s and a rise time less than 500ns. The rising edge of the sync waveform triggers the change in the state of the outputs. Slew Rate Setting Setting the LT3439 maximum slew rate is easy. The external resistor to ground on the RSL pin sets the maximum slew rate. To determine the maximum slew rate connect a 50k resistor pot with a 3.4k series resistance to the RSL pin. Start at the lowest resistance setting and increase the pot until the noise level meets your requirements. Note that slower slewing waveforms will lower the power supply efficiency. Consult Linear Technology Application Note 70, "A Monolithic Switching Regulator with 100V Output Noise" for recommended noise measurement techniques. Shutdown The SHDN pin is used to shut down the part. Grounding this pin will disable all internal circuitry. Increasing the SHDN voltage above the turn-on threshold, approximately 1.3V, will enable the part. At the turn-on threshold approximately 20A of current is sourced out of the pin. This current, in conjunction with the Thevenin resistance on the pin, sets up the amount of hysteresis. This allows the user to set the turn-on voltage of the supply and the start-up hysteresis with a resistor divider. The hysteresis can be used to prevent the part from shutting down due to input voltage sag from an initial high current draw. When the SHDN pin is greater than 2.1V, the hysteresis current is reduced to zero. In addition to the current hysteresis, there is also approximately 35mV of voltage hysteresis on the SHDN pin. If a resistor divider is used to set the turn on threshold the resistors are determined by the following equations:
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R + RB VON = A *V RB SHDN
RA VIN RB
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SHDN
VON is the input voltage at which the supply will turn on and VSHDN is the SHDN pin turn-on threshold, typically 1.3V. V VHYST = RA * SHDN + ISHDN RA || RB VHYST is the actual hysteresis voltage seen at the input voltage. ISHDN is the current hysteresis sourced by the IC at the turn-on threshold, typically 20A. VSHDN is the voltage hysteresis seen at the SHDN pin at the turn-on threshold, typically 35mV. The resistors can be calculated as follows:
RA = RB =
(VHYST * VSHDN - VON * VSHDN) (VHYST * VSHDN - VON * VSHDN) ISHDN * ( VON - VSHDN )
(0.5V * 1.3V - 5V * 35mV) = 18.27k
20A * 1.3V
ISHDN * VSHDN
For example if the turn-on voltage was to be set at 5V with 0.5V of hysteresis:
RA = RB =
(0.5V * 1.3V - 5V * 35mV) = 6.42k 20A * (5V - 1.3V )
The nearest 1% values would be 18.2k and 6.49k. A resistor in series with the SHDN pin could further change hysteresis without changing the turn-on voltage. Thermal Considerations Decreasing the noise by lowering the slew rate of the output switches does not come for free. Lower slew rates
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LT3439
APPLICATIO S I FOR ATIO
mean greater switching losses in the internal output switches. However, efficiency is only modestly reduced for a large improvement in EMI. Care should be taken to ensure that the worst-case input voltage and load current conditions do not cause an excessive die temperature. The total power dissipation of the IC is dominated by three loss terms, regulator losses, saturation losses and switching losses. The following formulas may be used to approximate these losses: 1. Regulator Dissipation: I PVIN = VIN 12mA + 60 where I is the average switch current. 2. Switch Saturation Dissipation: PVSAT = (VSAT)(I) 3. Switch Switching Dissipation:
PSW = 10 -6 I * VIN * I * fOSC + -4 * R + 10.8 -2.3 * 10 SL
(
(
-1.7 * 10 -3 * RSL + 65.8 V
Total IC power dissipation (PD) is the sum of these three terms. Die junction temperature can be computed as follows: TJ = TAMB + (PD)(JA) where TAMB is the ambient temperature, TJ is the junction temperature and JA is the thermal resistance from junction to ambient. The LT3439 comes in the 16-pin TSSOP with exposed backside package that has a very low junction-to-ambient thermal resistance (JA) of approximately 40C/W. Transformer Design Table 1 lists recommended center tapped transformers for a variety of input voltage, output voltage and power combinations.
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Table 1
NOMINAL INPUT VOLTAGE 5V 5V 5V 5V 5V 5V 12V NOMINAL OUTPUT VOLTAGE 12V 12V 15V 15V 12V 12V -12V OUTPUT POWER 1.5W 3.0W 1.5W 3.0W 1.5W 10W 6W COILTRONICS PART NUMBER CTX02-13716-X1 CTX02-13665-X1 CTX02-13713-X1 CTX02-13664-X1 CTX02-13834-X3 CTX02-13949-X1 CTX02-16076
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These transformers will yield slightly high output voltages so that they can accommodate an LDO regulator on the output. If your application is not listed, the LTC Applications group is available to assist in the choice and/or the design of the transformer. In the design/selection of the transformer the following characteristics are critical and should be considered. Turns Ratio The turns ratio of the transformer determines the output voltage. The following equation can be used as a first pass to calculate the turns ratio:
NS VOUT + VF = NP VIN - VSW
)
)
where VF is the forward voltage of the output diode and VSW is the voltage drop across the internal switches (see Typical Performance curves). Sufficient margin should be added to the turns ratio to account for voltage drops due to transformer winding resistances. Also, if using an LDO for regulating the output voltage, don't forget to take into account the voltage drop that should be added to VOUT. Magnetizing Current The primary inductance of the transformer causes a ripple current that is independent of load current. The ripple current manifests itself in the output voltage through the parasitic resistances of the supply. Increasing the transformer magnetizing inductance can reduce the ripple
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LT3439
APPLICATIO S I FOR ATIO
current. This can be accomplished by adding more turns onto a given core or selecting a new core with a higher inductance per turn squared characteristic (AL). The following equation can be used to set the transformer primary inductance: LPRI = VIN tON I
tON can be calculated by 1/fOSC. I is somewhat arbitrary but a general rule of thumb is to set it between 10% to 30% of IPRI where IPRI is calculated as follows: IPRI = VOUT * IOUT VIN Eff
Eff can be estimated at 70%. Winding Resistance Resistance in either the primary or secondary winding will reduce overall efficiency and degrade load regulation. If efficiency or load regulation is unsatisfactory, verify that the voltage drops in the transformer windings are not excessive. Leakage Inductance When the output switches turn off, the transformer leakage inductance causes a voltage spike on the output switch collector. The size of the voltage spike is proportional to the magnitude of the leakage inductance and to the square of the load current (energy stored in the leakage inductance). The voltage spike should be limited so that it does not exceed the voltage breakdown of the output switches. This can be accomplished by reducing the transformer's leakage inductance or by reducing the maximum slew rate. The voltage slew control will limit the voltage spike by dissipating the leakage energy in the power switches. Transformer Imbalance A common concern for the push-pull topology is transformer imbalance. If the volt/second products of each half
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of the switching cycle do not match, the transformer's flux level walks up the BH curve and the transformer goes into saturation. This is undesirable because the effective magnetizing inductance drops off and the magnetizing current increases rapidly. Fortunately, there are parasitics in the circuit that counteract the transformer saturation. When the transformer begins to saturate the magnetizing current increases in one half of the switching cycle and therefore, the IR drops increase thereby reducing the volt/ second product of that half cycle. The transformer balance is maintained. Also, the losses in the transformer and the main switches have positive temperature coefficients eliminating the potential for thermal runaway. The LT3439 can compensate for small circuit imbalances, however care should be taken to balance both sides of the circuit including transformer design and PCB layout. Transformer Design Example The following is an example of the design of a DC transformer for a 5V to 5V at 500mA supply. Supply specs: VIN = 5V, VOUT = 5V, IOUT = 500mA, fOSC = 100kHz Assume: VF = 0.5V (forward voltage of output diode) Efficiency 70% Calculate the primary switch current (IPRI): IPRI = VOUT * IOUT 5V * 500mA = = 0.714A VIN Eff 5V * 70% The "Switch Voltage Drop vs Switch Current" Typical Performance curve gives a typical value of the switch voltage drop (VSW) for a given switch current (IPRI). In this example, IPRI 0.7A, therefore VSW 0.5V. Next, calculate the turns ratio:
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NS VOUT + VF 5V + 0.5V = = = 1.22 NP VIN - VSW 5V - 0.5V
Add 15% margin to account for winding resistance of the transformer:
NS = 1.22 + 15% = 1.41 NP
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LT3439
APPLICATIO S I FOR ATIO
The primary inductance is then calculated:
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1 fOSC LPRI = VIN = 5 100kHz = 467H IPRI 0.107 A I = 15% of IPRI = 0.15 * 0.714A = 0.107 A
Next, build a transformer with the calculated values of turns ratio and primary inductance. Minimize resistance in the windings. The turns ratio can be tweaked to get the specified output voltage. Capacitors The DC transformer topology runs effectively at 100% duty cycle (50% each side). This means that the input supply current is approximately constant. Therefore, large "hold-up type" capacitors are not necessary. A low value (> 4.7F), low ESR ceramic will be adequate to filter high frequency noise at the input. The output capacitors supply energy to the output load only during switch transitions. Therefore, large capacitance values are not necessary. Low ESR, surface mount capacitors such as ceramic, OS-CON of POSCAPs are recommended. An additional LC filter can be added in addition to the output capacitor to further reduce output noise. Transformer winding capacitance between the isolated primary and secondary have parasitic currents that can cause noise on the grounds. Providing a high frequency, low impedance path between the primary and secondary gives the parasitic currents a local return path. A 2.2nF, 1kV ceramic capacitor is recommended.
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Switching Diode Selection A fast recovery, surface mount diode such as a Schottky is recommended. The proximity of the diodes to the transformer outputs is important and should be as close as possible with short, wide traces connecting them. Optional LC Filter An optional LC filter, as shown on the Typical Application on the first page of this data sheet, should be included if ultralow noise and ripple are required. It is recommended that the corner frequency of the filter should be set a decade below the switching frequency so that the switch noise is attenuated by a factor of 100. For example, if the fOSC = 100kHz, then fCORNER = 10kHz where:
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fCORNER
More Help
1 2 * LC
AN70: "A Monolithic Switching Regulator with 100V Output Noise" contains much information concerning applications and noise measurement techniques. AN19: "LT1070 Design Manual" AN29: "Some Thoughts on DC-DC Converters" also have general knowledge on switching regulators. An LTC SwitcherCADTM model is available to verify design performance. The LTC Applications department is always ready to lend a helping hand.
SwitcherCAD is a trademark of Linear Technology Corporation.
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LT3439
TYPICAL APPLICATIO
VIN 5V
C1 4.7F 11 5 6 7 CT 820pF RT 16.9k SHDN
13 VIN COLA LT3439 SYNC CT RT GND 10 RSL PGND 1, 16 COLB 3
C1: TAIYO YUDEN JMK212BJ475KG C3-C6: SANYO OS-CON 20SVQP47M C9, C10: SANYO OS-CON 16SVQPA39M C11: AVX 1206AC222MA11A D1-D4: MMBD914 L1, L2: COILCRAFT DT1608C-333 T1: COILTRONICS CTX02-16030
3439 TA02
R4 49.9k
PACKAGE DESCRIPTIO
FE Package 16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
Exposed Pad Variation BA
2.74 (.108) 4.90 - 5.10* (.193 - .201) 2.74 (.108) 16 1514 13 12 1110 6.60 0.10 4.50 0.10 SEE NOTE 4 0.45 0.05 1.05 0.10 0.65 BSC RECOMMENDED SOLDER PAD LAYOUT 4.30 - 4.50* (.169 - .177) 0 - 8 12345678 1.10 (.0433) MAX 9
2.74 (.108) 2.74 6.40 (.108) BSC
0.09 - 0.20 (.0036 - .0079)
0.45 - 0.75 (.018 - .030)
0.65 (.0256) BSC
NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) 3. DRAWING NOT TO SCALE
0.195 - 0.30 (.0077 - .0118)
0.05 - 0.15 (.002 - .006)
FE16 (BA) TSSOP 0203
4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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Low Noise 5V to 12V Push-Pull DC Transformer
OPTIONAL D1 L1 BYP LT1761-BYP IN OUT GND ADJ C7 0.01F D2 T1
+
C3 47F
C4 47F
+
R1 442k
+
C9 39F
VOUT 12V 80mA
* *
14 4 RSI 16.9k
* *
D3 OPTIONAL D4 R8 10k C5 47F L2 C6 47F
R2 49.9k
BYP LT1964-BYP IN OUT GND ADJ
C8 0.01F
C11 2.2nF 1kV
R3 442k
VOUT -12V C10 80mA 39F
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LT3439
TYPICAL APPLICATIO
VIN 12V
C1 4.7F
C2 0.1F 11 5 6 7 CT 680pF RT 16.9k
SHDN LT3439 SYNC CT RT GND 10
RELATED PARTS
PART NUMBER LT1533 DESCRIPTION Slew Rate Controlled Ultralow Noise 1A Switching Regulator COMMENTS VIN: 2.7V to 23V, IQ (Supply): 12mA, ISD: <12A, SO-16, Low Noise: <100VP-P, Independent Control of Switch Voltage and Current Slew Rates VIN: 2.7V to 23V, IQ (Supply): 12mA, ISD: <12A, SO-16, Low Noise: <2mVP-P, Independent Control of Switch Voltage and Current Slew Rates VIN: 2.7V to 20V, IQ (Supply): 25mA, ISD: <24A, SSOP-20, Low Noise: <200VP-P, Independent Control of Switch Voltage and Current Slew Rates VIN: 2.7V to 20V, IQ (Supply): 12mA, ISD: <24A, SSOP-20, Greatly Reduced Conducted and Radiated EMI, Independent Control of Switch Voltage and Current Slew Rates VIN: 1.8V to 20V, VOUT(MIN): 1.22V, Dropout Voltage (V at IOUT): 0.30V, IQ (Supply): 30A, VOUT: 1.5V, 1.8V, 2.5V, 3V, 3.3V, 5V, ISD: <1A, SO-8, Low Noise: <20VRMSP-P VIN: 2.7V to 20V, VOUT(MIN): 1.21V, Dropout Voltage (V at IOUT): 0.34V, IQ (Supply): 1mA, VOUT: 1.8V, 2.5V, 3.3V, ISD: <1A, DD, TO220-5, Low Noise: <40VRMSP-P, "A" Version Stable with Ceramic Capacitors VIN: 1.8V to 20V, VOUT(MIN): 1.22V, Dropout Voltage (V at IOUT): 0.27V, IQ (Supply): 30A, VOUT: 1.5V, 1.8V, 2.5V, 3V, 3.3V, 5V, ISD: <1A, MS8, Low Noise: <20VRMSP-P VIN: 2.1V to 20V, VOUT(MIN): 1.21V, Dropout Voltage (V at IOUT): 0.34V, IQ (Supply): 1mA, VOUT: 1.5V, 1.8V, 2.5V, 3.3V, ISD: <1A, DD, TO220-5, SOT-223, SO-8, Low Noise: <40VRMSP-P, "A" Version Stable with Ceramic Capacitors VIN: -0.9V to -20V, VOUT(MIN): -1.21V, Dropout Voltage (V at IOUT): 0.34V, IQ (Supply): 30A, VOUT: Adj, -5V, ISD: <3A, ThinSOTTM, Low Noise: <30VRMSP-P, Stable with Ceramic Capacitors
3439f
LT1534/LT1534-1
Slew Rate Controlled Ultralow Noise 2A Switching Regulators
LT1683
Slew Rate Controlled Ultralow Noise Push-Pull Controller
LT1738
Slew Rate Controlled Ultralow Noise DC/DC Controller
LT1763
500mA, Low Noise Micropower, LDO
LT1764/LT1764A
3A, Low Noise, Fast Transient Response, LDOs
LT1962
300mA, Low Noise Micropower, LDO
LT1963/LT1963A
1.5A, Low Noise, Fast Transient Response, LDOs
LT1964
200mA, Low Noise Micropower, Negative LDO
ThinSOT is a trademark of Linear Technology Corporation.
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 q FAX: (408) 434-0507
q
U
Low Noise 12V to -12V, 6W Push-Pull DC Transformer
OPTIONAL T1 13 VIN COLA COLB RSL PGND 1, 16 3 D1 L2 33H C3 15F C4 15F LT1175 IN ILIM2 ILIM4 OUT GND SENSE
* *
14 4 RSI 16.9k
* *
C5 4.7F
3439 TA03
VOUT -12V 500mA
D2
R1 150k
R2 324k
C1: TDK C3216X5R1C475K C3, C4: TDK C4532X5R1E156M C5: TEK C3216X5R1C475K D1, D2: MBRA130LT3 L1: COILCRAFT DO1608C-333 T1: COILTRONICS CTX02-16076
LT/TP 0303 2K * PRINTED IN USA
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2002

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